

>>>>>>>>  TEST5067


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TARGET
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This is code to go into ROM U33 on an IBM 5150 (IBM PC) motherboard.
The IBM 5150 has special ROM requirements. See http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm


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REQUIRED
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1. A way of putting the BIN file into a suitable ROM/EPROM/EEPROM.
   The IBM 5150 has special ROM requirements. See http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm

2. Logic analyser (and the knowledge of how to use it).


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BIN FILES
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Per http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm, if a suitable adapter is used, 16 KB and 32 KB sized ROM/EPROM's can be used on the IBM 5150 motherboard.
Because of that, included here are 16 KB and 32 KB versions of TEST5067_8KB_SIZED.BIN, being TEST5067_16KB_SIZED.BIN and TEST5067_32KB_SIZED.BIN

TEST5067_8KB_SIZED.BIN is for an MCM68766 EPROM, or a 2564 EPROM.
TEST5067_32KB_SIZED.BIN is for a 27C256 EPROM (in a suitable adapter) or W27E257 EEPROM (in a suitable adapter).

Again, see http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm


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WHAT DOES THE CODE DO ?
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In a loop, the code:
Step 1: Reads address 055AAh (21930d) (055A:000A in the CPU)
Step 2: Reads address 0AA55h (43605d) (0AA5:0005 in the CPU)
 
( On a 64KB-256KB type of 5150 motherboard, both addresses are in bank 0. )

Reference diagram for 16KB-64KB ype motherboard at https://minuszerodegrees.net/5150/motherboard/IBM%205150%20motherboard%20-%2016KB-64KB%20-%20Address%20bus%20to%20memory%20address%20bus.png
Reference diagram for 64KB-256KB ype motherboard at https://minuszerodegrees.net/5150/motherboard/IBM%205150%20motherboard%20-%2064KB-256KB%20-%20Address%20bus%20to%20memory%20address%20bus.png

The purpose is to test the [address bus to memory address bus multiplexer], and associated circuitry.
I.e. Is the multiplexor creating the expected ROW and COLUMN adddresses on the memory address bus?

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PREREQUISITE
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Given that the source address comes from the address bus, you need to verify operation of the address bus first.

We do not want a RUBBISH IN = RUBBISH OUT situation.

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64KB-256KB TYPE MOTHERBOARD - WHAT YOU SHOULD OBSERVE IF USING A LOGIC ANALYSER
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Using a logic analyser:
- When motherboard address 055AAh is read, the ROW address presented to RAM chips (all banks) is 55h, and the COLUMN adddress presented is AAh.
- When motherboard address 0AA55h is read, the ROW address presented to RAM chips (all banks) is AAh, and the COLUMN adddress presented is 55h.

In TEST5076.ZIP is a logic analyser capture:
Line 1 = /RAS pin of any chip in bank 0. Bank 0 because the two motherboard addresses we use are in bank 0 of a 16KB-64KB motherboard, and therefore, bank 0 will be where the /RAS pulses are sent.
Line 2 = /CAS pin of any chip in bank 0. Bank 0 because the two motherboard addresses we use are in bank 0 of a 16KB-64KB motherboard, and therefore, bank 0 will be where the /CAS pulses are sent.
Line 3 = A group, being the memory address bus. I connected the 8 probes to the 8 address pins of a RAM chip in bank 0 (although other banks would have worked).

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16KB-64KB TYPE MOTHERBOARD - WHAT YOU SHOULD OBSERVE IF USING A LOGIC ANALYSER
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Using a logic analyser:
- When motherboard address 055AAh is read, the ROW address presented to RAM chips (all banks) is 55h, and the COLUMN adddress presented is 2Ah.  <-- 2A, not AA (memory bus is only 7 bits)
- When motherboard address 0AA55h is read, the ROW address presented to RAM chips (all banks) is 2Ah, and the COLUMN adddress presented is 55h.  <-- 2A, not AA (memory bus is only 7 bits)













