

>>>>>>>>  TEST5077


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TARGET
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This is code to go into ROM U33 on an IBM 5150 (IBM PC) motherboard.
The IBM 5150 has special ROM requirements. See http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm


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PREREQUISITE
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That TEST5077 and TEST5000 successfully pass.


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PURPOSE
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To gain SOME confidence that the IBM 5150 motherboard is addressing all of the U33 ROM chip okay.

If the test passes, you have that confidence.

If the test fails, do not immediately jump to the conclusion that there is an addressing problem.


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REQUIRED
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1. A parallel (LPT) port POST code reader.
   See http://www.minuszerodegrees.net/images4/Parallel%20port%20monitoring%20POST%20board.jpg

2. A parallel (LPT) port on your computer that is at one of the following I/O addresses: 378 or 278 or 3BC

3. A way of putting the BIN file into a suitable ROM/EPROM/EEPROM.
   The IBM 5150 has special ROM requirements. See http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm


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BIN FILES
------------------------------------

Per http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm, if a suitable adapter is used, 16 KB and 32 KB sized ROM/EPROM's can be used on the IBM 5150 motherboard.
Because of that, included here are 16 KB and 32 KB versions of TEST5077_8KB_SIZED.BIN, being TEST5077_16KB_SIZED.BIN and TEST5077_32KB_SIZED.BIN

TEST5077_8KB_SIZED.BIN is for an MCM68766 EPROM, or a 2564 EPROM.
TEST5077_16KB_SIZED.BIN is for a 27C128 EPROM (in a suitable adapter).
TEST5077_32KB_SIZED.BIN is for a 27C256 EPROM (in a suitable adapter) or W27E257 EEPROM (in a suitable adapter).

Again, see http://www.minuszerodegrees.net/5150/motherboard/5150_u33.htm


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WHAT DOES THE CODE DO ?
------------------------------------

- It is a crude ROM addressing test.

- Tests between motherboard addresses FE000 and FFFFF, the address range that the BIOS ROM (socket U33) of the IBM 5150 occupies.

- Outputs progress and good/bad status to parallel (LPT) ports 378, 278, and 3BC.

- Sequence:

  1. Send E0 to parallel (LPT) ports
  2. Two second delay
  3. If E0 at motherboard address FE000, as expected, send 11 to parallel (LPT) ports, otherwise (ERROR) send 99 to parallel (LPT) ports
  4. Two second delay

  5. Send E1 to parallel (LPT) ports
  6. Two second delay
  7. If E1 at motherboard address FE100, as expected, send 11 to parallel (LPT) ports, otherwise (ERROR) send 99 to parallel (LPT) ports
  8. Two second delay

   9. Send E2 to parallel (LPT) ports
  10. Two second delay
  11. If E2 at motherboard address FE200, as expected, send 11 to parallel (LPT) ports, otherwise (ERROR) send 99 to parallel (LPT) ports
  12. Two second delay

  ......
  ......
  ......

  125. Send FF to parallel (LPT) ports
  126. Two second delay
  127. If FF at motherboard address FFF00, as expected, send 11 to parallel (LPT) ports, otherwise (ERROR) send 99 to parallel (LPT) ports
  128. Two second delay

  129. Halt the CPU


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WHAT YOU SHOULD OBSERVE
------------------------------------

From start to finish, the test takes about 2 and a half minutes (@ 4.77 MHz).

If you are using the aforementioned reader (has two 14-segment displays, with the right one showing the last byte received):

Expect to see the following sequence (with about 2 seconds between changes in display):

   [xx][E0]  <---- Ignore this
   [E0][11]  <---- Good: E0 followed by 11   (would be [E0][99] if error)
   [11][E1]  <---- Ignore this
   [E1][11]  <---- Good: E1 followed by 11   (would be [E1][99] if error)
   [11][E2]  <---- Ignore this
   [E2][11]  <---- Good: E2 followed by 11   (would be [E2][99] if error)
   [11][E3]  <---- Ignore this
   [E3][11]  <---- Good: E3 followed by 11   (would be [E3][99] if error)
   [11][E4]  <---- Ignore this
   [E4][11]  <---- Good: E4 followed by 11   (would be [E4][99] if error)
   [11][E5]  <---- Ignore this
   [E5][11]  <---- Good: E5 followed by 11   (would be [E5][99] if error)
   [11][E6]  <---- Ignore this
   [E6][11]  <---- Good: E6 followed by 11   (would be [E6][99] if error)
   [11][E7]  <---- Ignore this
   [E7][11]  <---- Good: E7 followed by 11   (would be [E7][99] if error)
   [11][E8]  <---- Ignore this
   [E8][11]  <---- Good: E8 followed by 11   (would be [E8][99] if error)
   [11][E9]  <---- Ignore this
   [E9][11]  <---- Good: E9 followed by 11   (would be [E9][99] if error)
   [11][EA]  <---- Ignore this
   [EA][11]  <---- Good: EA followed by 11   (would be [EA][99] if error)
   [11][EB]  <---- Ignore this
   [EB][11]  <---- Good: EB followed by 11   (would be [EB][99] if error)
   [11][EC]  <---- Ignore this
   [EC][11]  <---- Good: EC followed by 11   (would be [EC][99] if error)
   [11][ED]  <---- Ignore this
   [ED][11]  <---- Good: ED followed by 11   (would be [ED][99] if error)
   [11][EE]  <---- Ignore this
   [EE][11]  <---- Good: EE followed by 11   (would be [EE][99] if error)
   [11][EF]  <---- Ignore this
   [EF][11]  <---- Good: EF followed by 11   (would be [EF][99] if error)

   [11][F0]  <---- Ignore this
   [F0][11]  <---- Good: F0 followed by 11   (would be [F0][99] if error)
   [11][F1]  <---- Ignore this
   [F1][11]  <---- Good: F1 followed by 11   (would be [F1][99] if error)
   [11][F2]  <---- Ignore this
   [F2][11]  <---- Good: F2 followed by 11   (would be [F2][99] if error)
   [11][F3]  <---- Ignore this
   [F3][11]  <---- Good: F3 followed by 11   (would be [F3][99] if error)
   [11][F4]  <---- Ignore this
   [F4][11]  <---- Good: F4 followed by 11   (would be [F4][99] if error)
   [11][F5]  <---- Ignore this
   [F5][11]  <---- Good: F5 followed by 11   (would be [F5][99] if error)
   [11][F6]  <---- Ignore this
   [F6][11]  <---- Good: F6 followed by 11   (would be [F6][99] if error)
   [11][F7]  <---- Ignore this
   [F7][11]  <---- Good: F7 followed by 11   (would be [F7][99] if error)
   [11][F8]  <---- Ignore this
   [F8][11]  <---- Good: F8 followed by 11   (would be [F8][99] if error)
   [11][F9]  <---- Ignore this
   [F9][11]  <---- Good: F9 followed by 11   (would be [F9][99] if error)
   [11][FA]  <---- Ignore this
   [FA][11]  <---- Good: FA followed by 11   (would be [FA][99] if error)
   [11][FB]  <---- Ignore this
   [FB][11]  <---- Good: FB followed by 11   (would be [FB][99] if error)
   [11][FC]  <---- Ignore this
   [FC][11]  <---- Good: FC followed by 11   (would be [FC][99] if error)
   [11][FD]  <---- Ignore this
   [FD][11]  <---- Good: FD followed by 11   (would be [FD][99] if error)
   [11][FE]  <---- Ignore this
   [FE][11]  <---- Good: FE followed by 11   (would be [FE][99] if error)
   [11][FF]  <---- Ignore this
   [FF][11]  <---- Good: FF followed by 11   (would be [FF][99] if error)




